標(biāo)題: Titlebook: Constructive Side-Channel Analysis and Secure Design; 15th International W Romain Wacquez,Naofumi Homma Conference proceedings 2024 The Edi [打印本頁(yè)] 作者: Buchanan 時(shí)間: 2025-3-21 19:12
書(shū)目名稱Constructive Side-Channel Analysis and Secure Design影響因子(影響力)
書(shū)目名稱Constructive Side-Channel Analysis and Secure Design影響因子(影響力)學(xué)科排名
書(shū)目名稱Constructive Side-Channel Analysis and Secure Design網(wǎng)絡(luò)公開(kāi)度
書(shū)目名稱Constructive Side-Channel Analysis and Secure Design網(wǎng)絡(luò)公開(kāi)度學(xué)科排名
書(shū)目名稱Constructive Side-Channel Analysis and Secure Design被引頻次
書(shū)目名稱Constructive Side-Channel Analysis and Secure Design被引頻次學(xué)科排名
書(shū)目名稱Constructive Side-Channel Analysis and Secure Design年度引用
書(shū)目名稱Constructive Side-Channel Analysis and Secure Design年度引用學(xué)科排名
書(shū)目名稱Constructive Side-Channel Analysis and Secure Design讀者反饋
書(shū)目名稱Constructive Side-Channel Analysis and Secure Design讀者反饋學(xué)科排名
作者: 1FAWN 時(shí)間: 2025-3-22 00:16 作者: concert 時(shí)間: 2025-3-22 01:09
978-3-031-57542-6The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerl作者: acheon 時(shí)間: 2025-3-22 07:55 作者: negligence 時(shí)間: 2025-3-22 09:22
Rui Chen,Dehui Li,Qihua Xiong,Handong Suning faults into target circuits. These days, EMFI draws attention as a real threat to cryptographic circuits because of its inherent advantages. Although EMFI has become popular, there are only a few works on EMFI at the lowest physical level. In this paper, we experimentally show that EMFI induces 作者: mendacity 時(shí)間: 2025-3-22 13:13 作者: mendacity 時(shí)間: 2025-3-22 19:45 作者: 口音在加重 時(shí)間: 2025-3-23 00:49 作者: 艦旗 時(shí)間: 2025-3-23 01:51
https://doi.org/10.1007/978-3-642-28018-4s pointed out a significant challenge: overcoming the initial learning plateau. This paper discusses the advantages of multi-task learning to break through the initial plateau consistently. We investigate different ways of applying multi-task learning against masked AES implementations (via the ASCA作者: Forsake 時(shí)間: 2025-3-23 08:06 作者: 防御 時(shí)間: 2025-3-23 11:03
Chapter 3 Monetary Cooperation: Case Cormation. For the first time, we evaluate the feasibility of execution of deep learning-based side-channel analysis on standard server equipment using an adapted HE protocol. By examining accuracy and execution time, it demonstrates the successful application of private SCA on both unprotected and p作者: 刺激 時(shí)間: 2025-3-23 17:09
Zaiwu Gong,Yi Lin,Tianxiang Yaohtweight solution for key storage, they are frequently suggested in an environment where attackers have direct access to the hardware. This triggered the evaluation of PUFs regarding side-channel weaknesses and the development of corresponding countermeasures. One primitive to overcome such attacks 作者: 溫順 時(shí)間: 2025-3-23 20:24
Zaiwu Gong,Yi Lin,Tianxiang Yaovices exploits the noise jitter accumulation with ring oscillators. The Set-Reset latch (SR-latch) TRNG is another type which exploits the state of latches around metastability. In this TRNG the dynamic noise is extracted by analysing the convergence state of the related latch. The advantage is its 作者: Misnomer 時(shí)間: 2025-3-24 02:13
https://doi.org/10.1007/978-3-642-28777-0n scheme and the superposition property of the Superposition-Tweak-Key (.) framework. The random seed of the PRNG is divided into two parts; one part is used as an ephemeral key that changes every two calls to a tweakable block cipher (TBC), and the other part is used as a static long-term key. Usin作者: 杠桿 時(shí)間: 2025-3-24 06:01
Andreas Krau?,János jósvai,Egon Müllerthe runtime of SPHINCS+ is caused by the evaluation of several hash- and pseudo-random functions, instantiated via the hash primitive, offloading this computation to dedicated hardware accelerators is a natural step. In this work, we evaluate different architectures for hardware acceleration of such作者: 皺痕 時(shí)間: 2025-3-24 06:49
https://doi.org/10.1007/978-3-642-28923-1 the dimension of the oil space and therefore, the parameter sizes in general, can be reduced. This significantly reduces the public key size while maintaining the appealing properties of UOV, like short signatures and fast verification. Therefore, MAYO is considered as an attractive candidate in th作者: impaction 時(shí)間: 2025-3-24 13:48 作者: Cuisine 時(shí)間: 2025-3-24 15:41 作者: 新鮮 時(shí)間: 2025-3-24 23:05 作者: Counteract 時(shí)間: 2025-3-25 01:02
Characterizing and?Modeling Synchronous Clock-Glitch Fault Injectiontiveness against embedded systems with minimal setup. These attacks exploit vulnerabilities with ease, underscoring the importance of comprehensively understanding EMFI. Recent studies have highlighted the impact of EMFI on phase-locked loops (PLLs), uncovering specific clock glitches that induce fa作者: 解凍 時(shí)間: 2025-3-25 06:41
On-Chip Evaluation of Voltage Drops and Fault Occurrence Induced by Si Backside EM Injectioning faults into target circuits. These days, EMFI draws attention as a real threat to cryptographic circuits because of its inherent advantages. Although EMFI has become popular, there are only a few works on EMFI at the lowest physical level. In this paper, we experimentally show that EMFI induces 作者: 浸軟 時(shí)間: 2025-3-25 08:02
EFFLUX-F2: A High Performance Hardware Security Evaluation Boardlso being applied in fields such as AI and Machine Learning to investigate possible threats. Security evaluations are reliant on standard test setups including commercial and open-source evaluation boards such as, SASEBO/SAKURA and ChipWhisperer. However, with shrinking design footprints and overlap作者: epinephrine 時(shí)間: 2025-3-25 14:40
Practical Improvements to?Statistical Ineffective Fault Attackss, which require both faulty and correct ciphertexts under the same key, SFA leverages only faulty ciphertexts. In CHES 2018, more powerful attacks called Statistical Ineffective Fault Attacks (SIFA) have been proposed. In contrast to the previous fault attacks that utilize faulty ciphertexts, SIFA 作者: 起草 時(shí)間: 2025-3-25 16:21
CAPABARA: A Combined Attack on?CAPA to protecting against passive physical attacks (. side-channel analysis (SCA)), the landscape of protection against other types of physical attacks remains a challenge. Fault attacks (FA), though attracting growing attention in research, still lack the prevalence of provably secure designs when com作者: geometrician 時(shí)間: 2025-3-25 22:04
Exploring Multi-task Learning in?the?Context of?Masked AES Implementationss pointed out a significant challenge: overcoming the initial learning plateau. This paper discusses the advantages of multi-task learning to break through the initial plateau consistently. We investigate different ways of applying multi-task learning against masked AES implementations (via the ASCA作者: Regurgitation 時(shí)間: 2025-3-26 02:22
The Need for?MORE: Unsupervised Side-Channel Analysis with?Single Network Training and?Multi-output sion (MOR) approach for non-profiling side-channel analysis. Then, we significantly improve its performance by updating the loss function and distinguisher, then employing a novel concept of validation set to reduce overfitting. We denote our approach as MORE - Multi-Output Regression Enhanced, whic作者: 預(yù)測(cè) 時(shí)間: 2025-3-26 06:32 作者: Radiculopathy 時(shí)間: 2025-3-26 12:22 作者: jocular 時(shí)間: 2025-3-26 12:56
Impact of?Process Mismatch and?Device Aging on?SR-Latch Based True Random Number Generatorsvices exploits the noise jitter accumulation with ring oscillators. The Set-Reset latch (SR-latch) TRNG is another type which exploits the state of latches around metastability. In this TRNG the dynamic noise is extracted by analysing the convergence state of the related latch. The advantage is its 作者: Semblance 時(shí)間: 2025-3-26 20:52 作者: foliage 時(shí)間: 2025-3-27 01:01
The Impact of?Hash Primitives and?Communication Overhead for?Hardware-Accelerated SPHINCS+the runtime of SPHINCS+ is caused by the evaluation of several hash- and pseudo-random functions, instantiated via the hash primitive, offloading this computation to dedicated hardware accelerators is a natural step. In this work, we evaluate different architectures for hardware acceleration of such作者: 桶去微染 時(shí)間: 2025-3-27 04:40
HaMAYO: A Fault-Tolerant Reconfigurable ,rdware Implementation of?the?, Signature Scheme the dimension of the oil space and therefore, the parameter sizes in general, can be reduced. This significantly reduces the public key size while maintaining the appealing properties of UOV, like short signatures and fast verification. Therefore, MAYO is considered as an attractive candidate in th作者: STERN 時(shí)間: 2025-3-27 08:59 作者: 四牛在彎曲 時(shí)間: 2025-3-27 10:43
Constructive Side-Channel Analysis and Secure Design15th International W作者: Hypopnea 時(shí)間: 2025-3-27 17:35
Robert M. Metzger,Daniell L. Matternsting fault models, such as the Timing Fault Model and the Sampling Fault Model, in explaining SCGs. Our findings reveal specific failure modes in D flip-flops (DFFs), contributing to a deeper understanding of EMFI effects and aiding in the development of more robust defensive strategies against suc作者: dissent 時(shí)間: 2025-3-27 20:28
Rui Chen,Dehui Li,Qihua Xiong,Handong Sun. EMFI uses an antenna coil with the diameter of 1?mm, scans and contacts it over the backside chip surface within the area of 3?mm?×?4?mm. With our detailed, chip-level and multi-physics exploration of EMFI delivered in this paper, we find the need of more in-depth understandings on EMFI mechanisms作者: Inclement 時(shí)間: 2025-3-28 00:43
https://doi.org/10.1007/978-3-642-28018-4ch in contrast to the original SIFA, requires injecting faults in the earlier rounds of an encryption or decryption operation. If we consider the start of the operation as the trigger for fault injection, the cumulative jitter in the first few rounds of a cipher is much lower than the last rounds. H作者: FAR 時(shí)間: 2025-3-28 05:16
Chapter 3 Monetary Cooperation: Case Cwith a robust adversarial model that goes beyond conventional SCA and FA adversarial models. Drawing inspiration from the principles of Multiparty Computation (MPC), CAPA claims security against higher-order SCA, higher-order fault attacks, and their combination. In this work, we present a combined 作者: glacial 時(shí)間: 2025-3-28 07:29
Zaiwu Gong,Yi Lin,Tianxiang Yaopower spectrum in the frequency domain. Theoretical analysis provides an understanding of the root cause of the leakage; Practical experiments show the significance of the leakage sources and the feasibility of the attack. Potential countermeasures and the impact on the Loop PUF and its derivatives 作者: 粗鄙的人 時(shí)間: 2025-3-28 10:38
Zaiwu Gong,Yi Lin,Tianxiang Yao succeed. To fill the gap, in this paper, we propose a closed form of the average entropy of the SR-latch based TRNG taking into account the process mismatch and allowing the designer to know precisely the number of SR-latches required for an optimal entropy. This is highly crucial to avoid low entr作者: 遵循的規(guī)范 時(shí)間: 2025-3-28 15:26 作者: 閃光你我 時(shí)間: 2025-3-28 20:14
https://doi.org/10.1007/978-3-642-28923-1architectures. Our approach features adaptable configurations aligned with NIST-defined security levels and incorporates resources optimization modules. Our implementation is specifically tested on the Zynq ZedBoard with the Zynq-7020 SoC, with performance evaluations and comparisons made against pr作者: PLE 時(shí)間: 2025-3-29 02:02
Microfiltration of Deforming Droplets,r work. On simulated traces, we show that combining the countermeasures complicates both a simple CPA and a deep learning attack. As is, the combination of these countermeasures seems beneficial and should be particularly relevant in any context where loop shuffling benefits vanish due to the leakag作者: 領(lǐng)先 時(shí)間: 2025-3-29 04:34 作者: restrain 時(shí)間: 2025-3-29 07:50
On-Chip Evaluation of Voltage Drops and Fault Occurrence Induced by Si Backside EM Injection. EMFI uses an antenna coil with the diameter of 1?mm, scans and contacts it over the backside chip surface within the area of 3?mm?×?4?mm. With our detailed, chip-level and multi-physics exploration of EMFI delivered in this paper, we find the need of more in-depth understandings on EMFI mechanisms作者: Feedback 時(shí)間: 2025-3-29 11:23 作者: Lice692 時(shí)間: 2025-3-29 17:45
CAPABARA: A Combined Attack on?CAPAwith a robust adversarial model that goes beyond conventional SCA and FA adversarial models. Drawing inspiration from the principles of Multiparty Computation (MPC), CAPA claims security against higher-order SCA, higher-order fault attacks, and their combination. In this work, we present a combined 作者: Morbid 時(shí)間: 2025-3-29 21:39 作者: generic 時(shí)間: 2025-3-30 03:52
Impact of?Process Mismatch and?Device Aging on?SR-Latch Based True Random Number Generators succeed. To fill the gap, in this paper, we propose a closed form of the average entropy of the SR-latch based TRNG taking into account the process mismatch and allowing the designer to know precisely the number of SR-latches required for an optimal entropy. This is highly crucial to avoid low entr作者: 補(bǔ)充 時(shí)間: 2025-3-30 06:04
Lightweight Leakage-Resilient PRNG from?TBCs Using Superpositionhan .-.; better Time-Data trade-off and leakage assumptions, using the recently popularized unpredictability with leakage. We verify our proposal by performing Test Vector Leakage Assessment (TVLA) on an .-based TBC (.-.) operated with a fixed key and a dynamic random tweak. Our results show that wh作者: fixed-joint 時(shí)間: 2025-3-30 09:58 作者: 靦腆 時(shí)間: 2025-3-30 15:58
Combining Loop Shuffling and?Code PolyMorphism for?Enhanced AES Side-Channel Securityr work. On simulated traces, we show that combining the countermeasures complicates both a simple CPA and a deep learning attack. As is, the combination of these countermeasures seems beneficial and should be particularly relevant in any context where loop shuffling benefits vanish due to the leakag作者: HUSH 時(shí)間: 2025-3-30 19:08 作者: 有惡意 時(shí)間: 2025-3-31 00:06
