標(biāo)題: Titlebook: Computer Engineering and Technology; 19th CCF Conference, Weixia Xu,Liquan Xiao,Chengyi Zhang Conference proceedings 2016 Springer-Verlag B [打印本頁] 作者: SPIR 時(shí)間: 2025-3-21 18:46
書目名稱Computer Engineering and Technology影響因子(影響力)
書目名稱Computer Engineering and Technology影響因子(影響力)學(xué)科排名
書目名稱Computer Engineering and Technology網(wǎng)絡(luò)公開度
書目名稱Computer Engineering and Technology網(wǎng)絡(luò)公開度學(xué)科排名
書目名稱Computer Engineering and Technology被引頻次
書目名稱Computer Engineering and Technology被引頻次學(xué)科排名
書目名稱Computer Engineering and Technology年度引用
書目名稱Computer Engineering and Technology年度引用學(xué)科排名
書目名稱Computer Engineering and Technology讀者反饋
書目名稱Computer Engineering and Technology讀者反饋學(xué)科排名
作者: 平靜生活 時(shí)間: 2025-3-21 22:03
Conference proceedings 2016 October 2015.?.The 18 papers presented were carefully reviewed and selected from 158 submissions. They are organized in topical sections on processor architecture; application specific processors; computer application and software optimization; technology on the horizon..作者: Constant 時(shí)間: 2025-3-22 01:07 作者: 清晰 時(shí)間: 2025-3-22 08:31 作者: 他日關(guān)稅重重 時(shí)間: 2025-3-22 10:19
https://doi.org/10.1007/978-4-431-53975-9 and expanded the design space of multi-core microprocessor floorplan. This work proposes a thermal-aware floorplanner for multi-core 3D ICs with interlayer cooling, with iterative algorithm based on simulated annealing method. The results show that the maximal temperature is reduced by 15.., and th作者: 楓樹 時(shí)間: 2025-3-22 16:51
https://doi.org/10.1007/978-4-431-53975-9ne. This paper analysis the sensitivity conditions of several fault types not covered by the March C+ algorithm, and derived a new 22?N algorithm, March Y, which increase the fault coverage of WDF, CFdsxwx and CFwd. March Y has the same symmetry as the March C+ algorithm, and achieves the coverage o作者: 楓樹 時(shí)間: 2025-3-22 21:01
Tax Policy in the Nordic Countriess. The researchers employ a variety of methods to reduce the influence of soft errors. Besides the lower delay and increasing bandwidth, 3D integration technology also has the ability of heterogeneous integration. STT-RAM is a new storage technology with broad prospects. The characteristic that STT-作者: 氣候 時(shí)間: 2025-3-22 22:17
https://doi.org/10.1007/978-3-642-28317-8 reversal at input or output stage increases the difficulty for parallel I/O. In this paper, a new and simple generalized memory address transformation method supporting parallel accessing for computation is proposed to accelerate 2.-point Mixed-Radix FFT for memory-based FFT processors with SIMD ex作者: 不法行為 時(shí)間: 2025-3-23 01:21
Tax Progression in OECD Countriesy utilizing the tremendous memory bandwidth and the texture memory, the performance of this algorithm can be efficiently improved. Experimental results show that the performance of the proposed algorithm can be improved up to 8x times on Nvidia Tesla C2070, compared with the implementation on the In作者: Gnrh670 時(shí)間: 2025-3-23 06:51 作者: 冷漠 時(shí)間: 2025-3-23 13:05 作者: 懶惰民族 時(shí)間: 2025-3-23 16:06 作者: Modicum 時(shí)間: 2025-3-23 22:01
https://doi.org/10.1007/978-1-4302-4843-9water army groups detection method which consists of 4 steps. Firstly, we break the virtual community into a series of time windows and find the suspicious periods when water army groups are active. Then we build the user cooperative networks of suspicious periods according to user’s reply behaviors作者: Factual 時(shí)間: 2025-3-24 01:44
Tax Strategies for the Small Business Ownerus on the motion of the interaction of numerous molecules or atoms. Most scholars focus on accelerating MD on multicore central processing units (CPUs) or other coprocessors, such as graphics processing unit (GPU) or many integrated cores [.]. However, most researchers disregard CPU resources and me作者: Devastate 時(shí)間: 2025-3-24 02:53
https://doi.org/10.1007/978-1-4302-4843-9evelopment of lightweight server processors, i.e., x86 single-chip processors and ARM64 processors, and the high-performance interconnect fabric, an approach building a cloud server on top of virtualized I/O is presented in this paper. Its advantage is to provide high performance/cost, performance/W作者: PRISE 時(shí)間: 2025-3-24 07:56
Mihir A. Desai,Dhammika Dharmapalarallel Processor keeps losing its rank in the fastest computer list. Cluster’s rank and share in the TOP500 list has been steadily rising at a tremendous speed. Perspectives are given on how supercomputers have evolved thru time. The architectures are presented in chronological order. And finally, t作者: 惹人反感 時(shí)間: 2025-3-24 12:52
https://doi.org/10.1007/978-3-540-77276-7er in moving carriers will acted by vibrations. The objective of this paper is to provide a systematic investigation to computer-aided design of the vibration isolator for protection of electronic equipment in harsh vibration environment. This papers deal with fast solving method of natural frequenc作者: 懦夫 時(shí)間: 2025-3-24 18:41 作者: adequate-intake 時(shí)間: 2025-3-24 20:20
Communications in Computer and Information Sciencehttp://image.papertrans.cn/c/image/233537.jpg作者: 悠然 時(shí)間: 2025-3-25 01:32
Computer Engineering and Technology978-3-662-49283-3Series ISSN 1865-0929 Series E-ISSN 1865-0937 作者: Hla461 時(shí)間: 2025-3-25 06:04
Engaging in a U.S. trade or business,formance. The proposed two algorithms shorten the network long path latency. Compared to the based multicast routing algorithm, our simulations with six different synthetic workloads reveal that our architecture acquires high system performance.作者: seruting 時(shí)間: 2025-3-25 10:41 作者: 洞穴 時(shí)間: 2025-3-25 12:05
978-3-662-49282-6Springer-Verlag Berlin Heidelberg 2016作者: Campaign 時(shí)間: 2025-3-25 16:32 作者: CALL 時(shí)間: 2025-3-25 20:15
Partitioning Methods for Multicast in Bufferless 3D Network on Chipformance. The proposed two algorithms shorten the network long path latency. Compared to the based multicast routing algorithm, our simulations with six different synthetic workloads reveal that our architecture acquires high system performance.作者: 惡臭 時(shí)間: 2025-3-26 02:31
Thermal-Aware Floorplanner for Multi-core 3D ICs with Interlayer Cooling and expanded the design space of multi-core microprocessor floorplan. This work proposes a thermal-aware floorplanner for multi-core 3D ICs with interlayer cooling, with iterative algorithm based on simulated annealing method. The results show that the maximal temperature is reduced by 15.., and th作者: macular-edema 時(shí)間: 2025-3-26 07:26 作者: BRUNT 時(shí)間: 2025-3-26 08:35
Mitigating Soft Error Rate Through Selective Replication in Hybrid Architectures. The researchers employ a variety of methods to reduce the influence of soft errors. Besides the lower delay and increasing bandwidth, 3D integration technology also has the ability of heterogeneous integration. STT-RAM is a new storage technology with broad prospects. The characteristic that STT-作者: 挑剔小責(zé) 時(shí)間: 2025-3-26 15:37
A New Memory Address Transformation for Continuous-Flow FFT Processors with SIMD Extension reversal at input or output stage increases the difficulty for parallel I/O. In this paper, a new and simple generalized memory address transformation method supporting parallel accessing for computation is proposed to accelerate 2.-point Mixed-Radix FFT for memory-based FFT processors with SIMD ex作者: Obedient 時(shí)間: 2025-3-26 17:47
Designing Parallel Sparse Matrix Transposition Algorithm Using ELLPACK-R for GPUsy utilizing the tremendous memory bandwidth and the texture memory, the performance of this algorithm can be efficiently improved. Experimental results show that the performance of the proposed algorithm can be improved up to 8x times on Nvidia Tesla C2070, compared with the implementation on the In作者: Acquired 時(shí)間: 2025-3-26 22:16 作者: 吸引人的花招 時(shí)間: 2025-3-27 02:22
A ML-Based High-Accuracy Estimation of Sampling and Carrier Frequency Offsets for OFDM Systemsrmance of orthogonal frequency division multiplexing (OFDM) system. Using two identical frequency domain (FD) long training symbols in preamble, we propose a novel maximum-likelihood (ML) estimation method to simultaneously acquire the values of SFO and CFO, which extend the Kim’s and Wang’s estimat作者: Pandemic 時(shí)間: 2025-3-27 05:48
A High-PSRR CMOS Bandgap Reference Circuiton, BGRs with- and without- pre-regulator are, respectively, designed and simulated in the 0.13?μm standard CMOS process technology. Simulation results show that the PSRR of the designed BGR with pre-regulator achieves, respectively, ?107.3?dB, ?106.6?dB and?75?dB at 100?Hz, 1?kHz and 100?kHz, while作者: oxidant 時(shí)間: 2025-3-27 12:16
Detection and Analysis of Water Army Groups on Virtual Communitywater army groups detection method which consists of 4 steps. Firstly, we break the virtual community into a series of time windows and find the suspicious periods when water army groups are active. Then we build the user cooperative networks of suspicious periods according to user’s reply behaviors作者: 報(bào)復(fù) 時(shí)間: 2025-3-27 15:25
Accelerating Molecular Dynamics Simulations on Heterogeneous Architectureus on the motion of the interaction of numerous molecules or atoms. Most scholars focus on accelerating MD on multicore central processing units (CPUs) or other coprocessors, such as graphics processing unit (GPU) or many integrated cores [.]. However, most researchers disregard CPU resources and me作者: libertine 時(shí)間: 2025-3-27 19:49 作者: 割公牛膨脹 時(shí)間: 2025-3-27 23:10
The Evolution of Supercomputer Architecture: A Historical Perspectiverallel Processor keeps losing its rank in the fastest computer list. Cluster’s rank and share in the TOP500 list has been steadily rising at a tremendous speed. Perspectives are given on how supercomputers have evolved thru time. The architectures are presented in chronological order. And finally, t作者: JUST 時(shí)間: 2025-3-28 04:41 作者: browbeat 時(shí)間: 2025-3-28 06:53
Tax Policy in the Nordic Countrieshe experimental results show that the soft error rate of the proposed hybrid structure is reduced by 15?% on average and the AVF decreased 54.3?% further on average through the in-buffer selective replication mechanism while the performance penalty is 2.8?%.作者: endoscopy 時(shí)間: 2025-3-28 14:19
Tax Strategies for the Small Business Owneruse of CPU resources to compute for most research activities. In the second strategy, the CPU is set to compute the pair force of a small part of molecules along with the GPU after accomplishing the task of starting the GPU computation. The third strategy is applicable under the condition that the G作者: Exaggerate 時(shí)間: 2025-3-28 14:57 作者: Ballad 時(shí)間: 2025-3-28 21:15 作者: synchronous 時(shí)間: 2025-3-28 23:12 作者: 細(xì)節(jié) 時(shí)間: 2025-3-29 05:39 作者: enchant 時(shí)間: 2025-3-29 10:10
https://doi.org/10.1007/978-3-642-28317-8 for both I/O and computation with continuous data flow. And most importantly, the address transformation circuit for FFT computations is low-complexity with only XOR gates; the I/O addresses parallel generation circuit is also simple with just counters.作者: 古董 時(shí)間: 2025-3-29 11:40 作者: 修飾語 時(shí)間: 2025-3-29 17:24 作者: CLAN 時(shí)間: 2025-3-29 20:08
1865-0929 ology, NCCET 2015, held in Hefei, China, in October 2015.?.The 18 papers presented were carefully reviewed and selected from 158 submissions. They are organized in topical sections on processor architecture; application specific processors; computer application and software optimization; technology 作者: alcoholism 時(shí)間: 2025-3-30 03:53 作者: 體貼 時(shí)間: 2025-3-30 05:42 作者: 冰雹 時(shí)間: 2025-3-30 09:41
https://doi.org/10.1007/978-1-4302-4843-9pproach building a cloud server on top of virtualized I/O is presented in this paper. Its advantage is to provide high performance/cost, performance/Watt, high-density and high scalability compared with the existing method, to better meet the demands of cloud computing.作者: archaeology 時(shí)間: 2025-3-30 13:06
Mihir A. Desai,Dhammika Dharmapalaous speed. Perspectives are given on how supercomputers have evolved thru time. The architectures are presented in chronological order. And finally, the trend of current supercomputer architecture design is analyzed.作者: 性別 時(shí)間: 2025-3-30 16:35
Thermal-Aware Floorplanner for Multi-core 3D ICs with Interlayer Coolingrlayer cooling, with iterative algorithm based on simulated annealing method. The results show that the maximal temperature is reduced by 15.., and the temperature gradient is reduced by 28.4.. compared to the baseline design with 3 active device layers.作者: 傲慢人 時(shí)間: 2025-3-30 22:36 作者: Culmination 時(shí)間: 2025-3-31 03:06
A Cloud Server Based on I/O Virtualization in Hardwarepproach building a cloud server on top of virtualized I/O is presented in this paper. Its advantage is to provide high performance/cost, performance/Watt, high-density and high scalability compared with the existing method, to better meet the demands of cloud computing.作者: CHYME 時(shí)間: 2025-3-31 06:03
