標題: Titlebook: Compact Transistor Modelling for Circuit Design; Henk C. Graaff,Fran?ois M. Klaassen Book 1990 Springer-Verlag/Wien 1990 SPICE.circuit.cir [打印本頁] 作者: FERN 時間: 2025-3-21 17:27
書目名稱Compact Transistor Modelling for Circuit Design影響因子(影響力)
書目名稱Compact Transistor Modelling for Circuit Design影響因子(影響力)學(xué)科排名
書目名稱Compact Transistor Modelling for Circuit Design網(wǎng)絡(luò)公開度
書目名稱Compact Transistor Modelling for Circuit Design網(wǎng)絡(luò)公開度學(xué)科排名
書目名稱Compact Transistor Modelling for Circuit Design被引頻次
書目名稱Compact Transistor Modelling for Circuit Design被引頻次學(xué)科排名
書目名稱Compact Transistor Modelling for Circuit Design年度引用
書目名稱Compact Transistor Modelling for Circuit Design年度引用學(xué)科排名
書目名稱Compact Transistor Modelling for Circuit Design讀者反饋
書目名稱Compact Transistor Modelling for Circuit Design讀者反饋學(xué)科排名
作者: 類型 時間: 2025-3-22 00:12
Book 1990urations could be analyzed by useful numerical techniques. Despite the resulting progress in device optimization, the above approach fails to provide a required compact set of device design and process control rules and a compact circuit model for the analysis of large-scale electronic designs. This作者: 譏笑 時間: 2025-3-22 03:22
0179-0307 o provide a required compact set of device design and process control rules and a compact circuit model for the analysis of large-scale electronic designs. This978-3-7091-9045-6978-3-7091-9043-2Series ISSN 0179-0307 作者: 受傷 時間: 2025-3-22 08:10
Models for the Depletion-Type MOSFET,hich is relatively weakly controlled by the gate electrode. When the channel implant is fairly strong, a hole inversion layer at the surface may occur, which prevents further depletion of the buried channel on a decrease in gate bias. Since this is an unwanted situation for practical application, we作者: 粗糙 時間: 2025-3-22 10:01
Compact Transistor Modelling for Circuit Design978-3-7091-9043-2Series ISSN 0179-0307 作者: 啞劇 時間: 2025-3-22 16:56
Sozialer Wandel und Koh?sionsforschungions which together define a given model. This description will be limited to vertical . transistors for integrated circuits, including the substrate effects of the parasitic . transistor. Vertical . transistors also exist, but they require no new fundamental additions.作者: 啞劇 時間: 2025-3-22 18:55
Computational Microelectronicshttp://image.papertrans.cn/c/image/230803.jpg作者: Heart-Attack 時間: 2025-3-22 22:02 作者: 撕裂皮肉 時間: 2025-3-23 02:32
Das Selbst in der sozialen Kommunikation,The use of lateral . transistors is widespread in linear integrated circuits. They are applied as active load devices, current sources, level shifters etc. [5.1]. Furthermore they are an integral part of integrated injection logic (...) circuits [5.2].作者: lipoatrophy 時間: 2025-3-23 07:26
Some Basic Semiconductor Physics,In this chapter we will deal shortly with a number of fundamental concepts of semiconductor physics (distribution functions, doping levels, carrier transport, mobility, etc.). One can also find here a set of formulas that are needed in the description of device phenomena and in the formulation of model equations.作者: 放肆的你 時間: 2025-3-23 11:58
Lateral , Transistor Models,The use of lateral . transistors is widespread in linear integrated circuits. They are applied as active load devices, current sources, level shifters etc. [5.1]. Furthermore they are an integral part of integrated injection logic (...) circuits [5.2].作者: Sad570 時間: 2025-3-23 14:19
https://doi.org/10.1007/978-3-7091-9043-2SPICE; circuit; circuit design; integrated circuit; model; modeling; simulation; transistor作者: 貪婪性 時間: 2025-3-23 18:50 作者: 文藝 時間: 2025-3-23 22:24
Compact Models for Vertical Bipolar Transistors,ions which together define a given model. This description will be limited to vertical . transistors for integrated circuits, including the substrate effects of the parasitic . transistor. Vertical . transistors also exist, but they require no new fundamental additions.作者: Clumsy 時間: 2025-3-24 04:44
?Aufsiedlungsmanagement“ in Neubauquartierenoncept in mind the designer actually built his circuit on a (printed-)circuit board with discrete elements (capacitors, resistors, inductors, transistors, etc.) and checked its electrical performance. If the result was not satisfactory, the discrete elements were changed in value and/or type, until 作者: 使尷尬 時間: 2025-3-24 09:54
https://doi.org/10.1007/978-3-658-25759-0the validity of the charge control principle. After that we will show how the various device phenomena like main currents, Early effect, depletion capacitance etc., can be described by means of compact, explicit and analytical mathematical expressions. Unless stated otherwise, the device structure c作者: 有權(quán) 時間: 2025-3-24 12:37 作者: GEON 時間: 2025-3-24 16:15 作者: cornucopia 時間: 2025-3-24 19:02
https://doi.org/10.1007/978-3-322-94543-3ET. Usually devices of this class are made on a uniform doped substrate or on a substrate with an implanted channel region. Examples are .-channel transistors with or without a .-type implanted layer in a .-type substrate and .-channel transistors with or without a shallow .-type implanted layer in 作者: Albumin 時間: 2025-3-25 03:12
https://doi.org/10.1007/978-3-322-94543-3perate in the on state at zero gate bias [8.1, 8.2]. Usually this class of devices is called depletion-type MOSFET. In practice mainly .-channel devices are applied. When the device is only used as a load, the characteristics can be satisfactorily described by an enhancement model with an appropriat作者: 橫條 時間: 2025-3-25 05:16 作者: 負擔 時間: 2025-3-25 07:42 作者: ARCHE 時間: 2025-3-25 14:54
Glaube, Werte und Soziales Lernen,evice is mainly characterized by the lateral dimensions of the junctions in bipolar transistors and by the channel length and width in MOS transistors. The dimensions must be known in silicon because only the real dimensions are electrically significant. They are determined by the dimensions of the 作者: congenial 時間: 2025-3-25 19:00 作者: 少量 時間: 2025-3-25 22:45
,Was passiert, wenn ?nichts passiert“?,that usually not all compact model parameters are independent from each other: the value given to one parameter may influence the value of another. The final judgement whether a parameter set is good enough lies in the fit to the measurements and in their physical plausibility.作者: 男學(xué)院 時間: 2025-3-26 00:08
Models for the Enhancement-Type MOSFET, will be followed by a discussion of models for short-channel devices, in which a number of corresponding effects, like threshold voltage lowering etc., are taken into account. Since MOSFETs are also employed nowadays in analog circuitry, we finally discuss modelling for this more demanding application.作者: 到婚嫁年齡 時間: 2025-3-26 05:40
Parameter Determination,that usually not all compact model parameters are independent from each other: the value given to one parameter may influence the value of another. The final judgement whether a parameter set is good enough lies in the fit to the measurements and in their physical plausibility.作者: Prologue 時間: 2025-3-26 10:34 作者: 清楚說話 時間: 2025-3-26 14:30 作者: 預(yù)定 時間: 2025-3-26 19:23
0179-0307 fective synergy of technological discoveries and physical understanding. Through physical reasoning, a feeling for the right assumption and the correct interpretation of experimental findings, a small group of pioneers conceived the major analytic design equations, which are currently to be found in作者: 異端邪說2 時間: 2025-3-26 22:29
?Aufsiedlungsmanagement“ in Neubauquartierenors, etc.) and checked its electrical performance. If the result was not satisfactory, the discrete elements were changed in value and/or type, until the electrical specifications were met. This empirical procedure was called breadboarding. With the advent of the integrated circuit this method was no longer appropriate, mainly for two reasons:作者: 前兆 時間: 2025-3-27 04:39
Das Selbst in der sozialen Kommunikation,rain current, threshold voltage, carrier mobility in an inversion layer, the saturation mode, dynamic operation and inherent parasitics. Unless stated otherwise, the device structure considered here is that of an .-channel transistor. In most cases, a .-channel device only needs a change of sign to produce its model formulas.作者: 偽書 時間: 2025-3-27 07:43 作者: colostrum 時間: 2025-3-27 12:52 作者: Paraplegia 時間: 2025-3-27 14:53 作者: HAUNT 時間: 2025-3-27 20:54
Process and Geometry Dependence, Optimization and Statistics of Parameters,. The dimensions must be known in silicon because only the real dimensions are electrically significant. They are determined by the dimensions of the mask, corrected for such effects as outdiffusion, underetching, misalignment of masks, encroachment of isolation oxides, etc.作者: archenemy 時間: 2025-3-28 00:57
,Welche St?rungsbilder gibt es?,implanted .-type layer in an n-well (bipolar IC-compatible JFET) or as an epitaxial layer on a semi-insulating substrate (GaAs MESFET). In the latter case a channel implant is often added for achieving better process control. Figs. 9.1 a and 9.1 b give a cross-section of the JFET and the MESFET, respectively.作者: senile-dementia 時間: 2025-3-28 03:48 作者: BUOY 時間: 2025-3-28 07:03
https://doi.org/10.1007/978-3-658-25759-0onsidered here is that of a vertical . transistor. In most cases the vertical . transistor only needs a change of sign in its model formulas. The lateral . transistor, which is quite different, will be treated in a separate chapter.作者: CESS 時間: 2025-3-28 13:46 作者: scoliosis 時間: 2025-3-28 16:15 作者: EXALT 時間: 2025-3-28 20:26
Compact Models for Vertical Bipolar Transistors,ions which together define a given model. This description will be limited to vertical . transistors for integrated circuits, including the substrate effects of the parasitic . transistor. Vertical . transistors also exist, but they require no new fundamental additions.作者: Servile 時間: 2025-3-29 00:41 作者: Fibroid 時間: 2025-3-29 05:50 作者: 芳香一點 時間: 2025-3-29 08:11 作者: vasospasm 時間: 2025-3-29 13:53
Models for the JFET and the MESFET, field-effect transistor (MESFET) are considerable, their physical operation is almost identical. The modelling of these devices is therefore discussed in one chapter. In both cases transistor operation is achieved by depleting an already existing channel region via a gate-controlled . junction or a作者: Outwit 時間: 2025-3-29 18:26
