標(biāo)題: Titlebook: Architecture of Computing Systems - ARCS 2012; 25th International C Andreas Herkersdorf,Kay R?mer,Uwe Brinkschulte Conference proceedings 2 [打印本頁(yè)] 作者: Constrict 時(shí)間: 2025-3-21 17:11
書目名稱Architecture of Computing Systems - ARCS 2012影響因子(影響力)
書目名稱Architecture of Computing Systems - ARCS 2012影響因子(影響力)學(xué)科排名
書目名稱Architecture of Computing Systems - ARCS 2012網(wǎng)絡(luò)公開度
書目名稱Architecture of Computing Systems - ARCS 2012網(wǎng)絡(luò)公開度學(xué)科排名
書目名稱Architecture of Computing Systems - ARCS 2012被引頻次
書目名稱Architecture of Computing Systems - ARCS 2012被引頻次學(xué)科排名
書目名稱Architecture of Computing Systems - ARCS 2012年度引用
書目名稱Architecture of Computing Systems - ARCS 2012年度引用學(xué)科排名
書目名稱Architecture of Computing Systems - ARCS 2012讀者反饋
書目名稱Architecture of Computing Systems - ARCS 2012讀者反饋學(xué)科排名
作者: Anticoagulant 時(shí)間: 2025-3-21 23:54
A Very Fast and Quasi-accurate Power-State-Based System-Level Power Modeling Methodology validate the accuracy of our methodology by comparing simulation results with measurements on a real mobile phone platform. Experimental results show that the simulated power profile matches very well with the measurements and it only takes about 100 . to simulate a 20 . GSM paging burst use case.作者: 蟄伏 時(shí)間: 2025-3-22 01:46 作者: overweight 時(shí)間: 2025-3-22 08:38 作者: 釘牢 時(shí)間: 2025-3-22 10:02 作者: 暫時(shí)別動(dòng) 時(shí)間: 2025-3-22 16:14
0302-9743 Munich, Germany, in February/March 2012.The 20 revised full papers presented in 7 technical sessions were carefully reviewed and selected from 65 submissions. The papers are organized in topical sections on robustness and fault tolerance, power-aware processing, parallel processing, processor cores作者: indignant 時(shí)間: 2025-3-22 20:44
Admissibility of Function Spacese., an HSPA/LTE channel decoder. A profound analysis of the impact of timing and soft errors on the system behavior is presented. Dynamic techniques utilizing higher layers of communication systems to compensate these errors are proposed. This approach results in very low overhead for error resilience.作者: 圍巾 時(shí)間: 2025-3-23 01:14 作者: 珍奇 時(shí)間: 2025-3-23 02:10 作者: 劇本 時(shí)間: 2025-3-23 06:07
A Case Study on Error Resilient Architectures for Wireless Communicatione., an HSPA/LTE channel decoder. A profound analysis of the impact of timing and soft errors on the system behavior is presented. Dynamic techniques utilizing higher layers of communication systems to compensate these errors are proposed. This approach results in very low overhead for error resilience.作者: trigger 時(shí)間: 2025-3-23 10:04
Work Stealing Strategies for Parallel Stream Processing in Soft Real-Time Systemstealing suitable for stream processing applications. Such applications are frequently encountered in embedded systems, which often have to obey real-time constraints. Moreover, we give bounds on the maximum latency for certain stealing strategies. Our experimental results show a significant reduction of the latency using these strategies.作者: Axillary 時(shí)間: 2025-3-23 17:52 作者: 復(fù)習(xí) 時(shí)間: 2025-3-23 21:04 作者: Optometrist 時(shí)間: 2025-3-24 00:08
https://doi.org/10.1007/978-3-0348-8570-6 which degree a program cannot be fully parallelized due to data dependencies, a system with a Nvidia GTX 285 GPU achieves a speed-up of 2.7 times .., while for a single node of a Cray XD1 with a Xilinx Virtex4 LX160 the speed-up is about 1 times ...作者: Oligarchy 時(shí)間: 2025-3-24 04:18
Parabolic Problems in ,,-Spaces organized into pages and how virtual addresses should be translated into physical pages. In this paper, we present some preliminary ideas in this connection, and evaluate these new organizations using SPEC CPU2006 benchmarks.作者: Isolate 時(shí)間: 2025-3-24 10:08 作者: coagulate 時(shí)間: 2025-3-24 13:22
Dynamic Task-Scheduling and Resource Management for GPU Accelerators in Medical Imagingple GPUs in a system to minimize the average response time of applications. Moreover, it supports simultaneous execution of multiple tasks to hide data transfers latencies. We show that the scheduler interrupts scheduled and already enqueued applications to fulfill the timing requirements of high-priority dynamic tasks.作者: Cocker 時(shí)間: 2025-3-24 16:58 作者: Abrupt 時(shí)間: 2025-3-24 20:06
New Memory Organizations for 3D DRAM and PCMs organized into pages and how virtual addresses should be translated into physical pages. In this paper, we present some preliminary ideas in this connection, and evaluate these new organizations using SPEC CPU2006 benchmarks.作者: Patrimony 時(shí)間: 2025-3-25 01:31 作者: 熱情贊揚(yáng) 時(shí)間: 2025-3-25 06:39
Admissibility of Function Spaces the link and memory bandwidth. A novel mapping approach based on . is proposed for large-scale CMPs. This new combinatorial optimization method has delivered very good results in quality and computational cost when compared to the classical simulated annealing.作者: 違法事實(shí) 時(shí)間: 2025-3-25 10:37 作者: 能夠支付 時(shí)間: 2025-3-25 14:13
Static Task Mapping for Tiled Chip Multiprocessors with Multiple Voltage Islands the link and memory bandwidth. A novel mapping approach based on . is proposed for large-scale CMPs. This new combinatorial optimization method has delivered very good results in quality and computational cost when compared to the classical simulated annealing.作者: 五行打油詩(shī) 時(shí)間: 2025-3-25 18:06
A Low-Overhead Heuristic for Mixed Workload Resource Partitioning in Cluster-Based Architecturesal that our first implementation is able to manage tens of applications with an overhead of only fews milliseconds and a memory footprint of less than one hundred KB, thus suitable for usage on real systems.作者: 帽子 時(shí)間: 2025-3-25 20:41 作者: Nausea 時(shí)間: 2025-3-26 03:15
Parabolic Problems in ,,-Spaces validate the accuracy of our methodology by comparing simulation results with measurements on a real mobile phone platform. Experimental results show that the simulated power profile matches very well with the measurements and it only takes about 100 . to simulate a 20 . GSM paging burst use case.作者: 合適 時(shí)間: 2025-3-26 05:56
Hyperbolic Equations of Nonscalar Typeogramming models. In this work, an MPI implementation is optimized and extended to support the invasive programming model; the invasive model’s main idea is to allow for resource aware programming. The result is a library that provides resource awareness through extensions to MPI, while keeping its features and compatibility.作者: 煩人 時(shí)間: 2025-3-26 08:55 作者: prick-test 時(shí)間: 2025-3-26 13:24
Admissibility of Function Spaces the HW/SW co-design we present a simulation based tracing and profiling methodology for multi-core platforms following a generic and non-intrusive approach supporting easy adaptability, fast applicability and accurate performance measures.作者: enlist 時(shí)間: 2025-3-26 20:38 作者: Collision 時(shí)間: 2025-3-26 23:18 作者: MURKY 時(shí)間: 2025-3-27 02:22
HPC Performance Domains on Multi-core Processors with Virtualizationion methods offer performance predictability for the executed applications. Our experimental results show that the performance overhead of executing on a virtualized environment is not significant, with the bare-metal virtualization resulting in an overhead of only 3%. Most importantly, virtualizati作者: CODA 時(shí)間: 2025-3-27 09:11
Design Space Exploration of Hybrid Ultra Low Power Branch Predictorsn that reduces dynamic branch predictor aliasing, improves performance and requires a minimum of extra die space. The results presented relate die space requirements, energy use and performance impacts. We look at how best to optimise this balance in a way that is usually not considered, and on a lo作者: 令人不快 時(shí)間: 2025-3-27 12:29
Hyperbolic Equations of Nonscalar Typeto critical operations..To evaluate, we analyze robustness and quality-of-service of an H.264 video decoder. Using classification results, we map unreliable arithmetic operations onto probabilistic components of a simulated ARM-based architecture, while the remaining operations use deterministic com作者: NOVA 時(shí)間: 2025-3-27 17:19
Hyperbolic Equations of Nonscalar Typeity voting to guarantee correct results. Our flexible fault tolerant OpenMP approach has been evaluated for performance and fault coverage and it showed small overhead with good error detection and recovery rate.作者: FLAX 時(shí)間: 2025-3-27 20:02 作者: 干涉 時(shí)間: 2025-3-28 01:31
https://doi.org/10.1007/978-3-0348-8570-6n that reduces dynamic branch predictor aliasing, improves performance and requires a minimum of extra die space. The results presented relate die space requirements, energy use and performance impacts. We look at how best to optimise this balance in a way that is usually not considered, and on a lo作者: 虛假 時(shí)間: 2025-3-28 02:50 作者: 難解 時(shí)間: 2025-3-28 10:06 作者: Postulate 時(shí)間: 2025-3-28 11:08 作者: Interdict 時(shí)間: 2025-3-28 16:36
Further Applications and ComplementsIn order to be able to use multicore COTS hardware in critical systems, we put forward a time-oriented execution model and provide a general framework for programming and analysing a multicore compliant with the execution model.作者: 警告 時(shí)間: 2025-3-28 22:39 作者: 沙文主義 時(shí)間: 2025-3-29 01:39 作者: syring 時(shí)間: 2025-3-29 05:49 作者: Ferritin 時(shí)間: 2025-3-29 08:38
Hyperbolic Equations of Nonscalar Typeand shrinking structures..Compared to radiation-induced errors, probabilistic systems face increased error frequencies leading to unexpected bit-flips. Approaches like probabilistic CMOS provide methods to control error distributions which reduce the error probability in more significant bits. Howev作者: 泄露 時(shí)間: 2025-3-29 15:16 作者: 為現(xiàn)場(chǎng) 時(shí)間: 2025-3-29 19:15
Hyperbolic Equations of Nonscalar Typetial in shared memory parallel programs and in multi/many core architectures due to the decreasing size of transistors and growing number of failures. Very few research works and techniques for fault tolerant OpenMP programs were studied. These few works are based on checkpoint and recovery, and on 作者: faultfinder 時(shí)間: 2025-3-29 19:54 作者: 容易生皺紋 時(shí)間: 2025-3-30 01:06
Admissibility of Function Spacesance systems. This paper proposes techniques for static task mapping onto general-purpose CMPs with multiple pre-defined voltage islands for power management. The CMPs are assumed to contain different classes of processing elements with multiple voltage/frequency execution modes to better cover a la作者: 旅行路線 時(shí)間: 2025-3-30 06:39
https://doi.org/10.1007/978-3-0348-0499-8 control systems. Based upon a previous model of power management, formal interactions in between a hierarchical structure are characterized. In the architecture, strategic decisions allow coordinated adjusting of power management plans as well as local autonomy in subsystem scope.作者: coagulation 時(shí)間: 2025-3-30 08:45
Hyperbolic Equations of Nonscalar Type system on a chip. In typical configurations, the available memory is divided equally across the cores. Message passing is supported by means of an on-die Message Passing Buffer (MPB). The memory organization and hardware features of the SCC make it an interesting platform for evaluating parallel pr作者: 冷峻 時(shí)間: 2025-3-30 15:07 作者: 座右銘 時(shí)間: 2025-3-30 20:19 作者: monochromatic 時(shí)間: 2025-3-30 21:26 作者: 破布 時(shí)間: 2025-3-31 04:34
Admissibility of Function Spacestem. Especially the lack of an integrated HW/SW co-analysis methodology which allows to explore the behavior of programming models, runtime system and the virtual platform model of the multi-core system leads to the need for new developments in the field of HW/SW co-design tools. In order to support作者: 強(qiáng)壯 時(shí)間: 2025-3-31 06:06
Admissibility of Function Spaceshe capability of task preemption and prioritization becomes mandatory. Using GPUs as accelerators in this domain, imposes new challenges since GPU’s common FIFO scheduling does not support task prioritization and preemption. As a remedy, this paper investigates the employment of resource management 作者: 壁畫 時(shí)間: 2025-3-31 09:39
https://doi.org/10.1007/978-3-0348-8570-6coprocessors in hybrid computing systems. The underlying computation model assumes that the coprocessors are separate devices and that their input and output data are transferred from and into the system’s memory. The model considers all overheads involved when (sub-)tasks are performed on a coproce作者: agenda 時(shí)間: 2025-3-31 16:47
https://doi.org/10.1007/978-3-0348-8570-6for real-time applications, since the latency of a task is hardly predictable. In this paper, we propose a number of variants and extensions of work stealing suitable for stream processing applications. Such applications are frequently encountered in embedded systems, which often have to obey real-t作者: palliate 時(shí)間: 2025-3-31 21:15
https://doi.org/10.1007/978-3-0348-8570-6and performance are all at a premium. With embedded processors the large cache structures required for high performance branch prediction can easily take up more die space than the rest of the processor combined. When coupled with the large leakage energies, which are set to be an increasing issue a作者: 擴(kuò)張 時(shí)間: 2025-3-31 22:39 作者: 圓錐 時(shí)間: 2025-4-1 05:46
Hyperbolic Equations of Nonscalar Typected with metal wires while those on the different chips are connected wirelessly using the inductive-coupling. For saving power consumption of the vertical link, the clock and power supplies to the transmitter are stopped when their utilizations are between a specified range. Meanwhile, the whole w作者: 致命 時(shí)間: 2025-4-1 09:53
Admissibility of Function Spacesower consumption and cost of the system. Our pilot deployment for precision agriculture and fruit growing research showed similar conclusions and outlined the design decisions leading to SADmote: a new sensor node for environmental monitoring. It was evaluated both in the lab and field, showing impr作者: ANA 時(shí)間: 2025-4-1 12:46
https://doi.org/10.1007/978-3-642-28293-5dynamic process management; embedded systems; hardware design; network-on-chip; virtualization作者: Biguanides 時(shí)間: 2025-4-1 14:20 作者: Irritate 時(shí)間: 2025-4-1 21:15 作者: FATAL 時(shí)間: 2025-4-2 02:18
A Case Study on Error Resilient Architectures for Wireless Communication present a dynamic error detection and correction flow for wireless communication. We demonstrate this flow on a flexible state-of-the-art decoder, i.e., an HSPA/LTE channel decoder. A profound analysis of the impact of timing and soft errors on the system behavior is presented. Dynamic techniques u作者: LIEN 時(shí)間: 2025-4-2 04:32
Using Dynamic Task Level Redundancy for OpenMP Fault Tolerancetial in shared memory parallel programs and in multi/many core architectures due to the decreasing size of transistors and growing number of failures. Very few research works and techniques for fault tolerant OpenMP programs were studied. These few works are based on checkpoint and recovery, and on
