作者: 高度 時(shí)間: 2025-3-21 20:33 作者: Allergic 時(shí)間: 2025-3-22 02:07 作者: Fecundity 時(shí)間: 2025-3-22 05:54 作者: Prophylaxis 時(shí)間: 2025-3-22 12:03 作者: 痛恨 時(shí)間: 2025-3-22 13:50
Translation Validation: From DC+ to C target code which correctly implements the source code (compiler verification), each individual translation (i.e. a run of the compiler) is followed by a validation phase which verifies that the target code produced on this run correctly implements the submitted source program. In order to be a pra作者: COMMA 時(shí)間: 2025-3-22 19:49
A Practical Hierarchical Design by Timed Simulation Relations for Real-Time Systemsason, a hierarchical design method is useful. In the hierarchical design method, it is important to verify whether the low level specification satisfies the high level specification or not. In general, the language inclusion verification method is useful for verifying it. But, as nondeterministic ti作者: 隼鷹 時(shí)間: 2025-3-22 23:48 作者: acquisition 時(shí)間: 2025-3-23 02:21 作者: Focus-Words 時(shí)間: 2025-3-23 07:32
Integrating Domain Specific Language Design in the Software Life Cyclen additional tool in the established cycle, the language live cycle is independent and opens the doors for the application of formal methods. We report on an industrial case study, where a driver specification language has been designed, formally specified, and finally an implementation has been gen作者: Germinate 時(shí)間: 2025-3-23 13:24 作者: GRIN 時(shí)間: 2025-3-23 13:53
A Symbolic Model Checker for ACTLms (LTSs), the semantic domain for ACTL formulae, and uses symbolic manipulation algorithms. SAM has been realized by translating (networks of) LTSs and, possibly recursive, ACTL formulae into BSP (Boolean Symbolic Programming), a programming language aiming at defining computations on boolean funct作者: bisphosphonate 時(shí)間: 2025-3-23 18:19
The UniForM WorkBench A Higher Order Tool Integration Frameworkefabricated off-the-shelf development tools. The integration framework provides support for data, control and presentation integration as well as utilities for wrapping Haskell interfaces around existing development tools. Entire SDE’s are then glued together on the basis of these encapsulations usi作者: 填滿 時(shí)間: 2025-3-24 00:39
Two Real Formal Verification Experiences: ATM Switch Chip and Parallel Cache Protocolrify ATM switch LSI chips through the combined use of a theorem prover and model checking programs, and the second one is to try to formally verify the correctness of a cache coherency protocol used in one of our parallel PC servers by model checking programs. In both cases, the verifications themse作者: fibroblast 時(shí)間: 2025-3-24 04:03
Formal Methods in the Specification of the Emergency Closing System of the Eastern Scheldt Storm Sur(The Netherlands). Formal methods have proved to be very useful in obtaining an exact specification of the system and identifying possible errors..Formal methods also pose problems. Much depends on the communication between the client and the expert and, since the client is not able to assess the wo作者: 使更活躍 時(shí)間: 2025-3-24 08:21
Yoshimasa Masuda,Murlikrishna Viswanathanesign and analysis of complex hardware/software systems. The method allows one to start system development with a trustworthy high level system specification and to link such a “ground model” in a well documented and inspectable way through intermediate design steps to its implementation. The method作者: Scleroderma 時(shí)間: 2025-3-24 13:28 作者: progestogen 時(shí)間: 2025-3-24 16:50 作者: novelty 時(shí)間: 2025-3-24 20:33
Integrated Series in Information Systemsmplex statecharts, i.e. containing hierarchy and concurrency, using a ‘divide and conquer’ strategy. Initially, test cases are generated for simple statecharts and then these test cases are ‘merged’ to derive test cases for complex statecharts. They are then populated with test data. Methods for gen作者: 抱負(fù) 時(shí)間: 2025-3-24 23:55
https://doi.org/10.1007/978-0-387-34567-3orrect binary compiler executable. We will concentrate on implementation verification. Machine program correctness is proved by a special bootstrapping technique with a posteriori code inspection. Our contribution is to perform this work for compilers and, hence, to relieve the application programme作者: 小平面 時(shí)間: 2025-3-25 07:22
https://doi.org/10.1007/978-0-387-34567-3 target code which correctly implements the source code (compiler verification), each individual translation (i.e. a run of the compiler) is followed by a validation phase which verifies that the target code produced on this run correctly implements the submitted source program. In order to be a pra作者: 怒目而視 時(shí)間: 2025-3-25 08:27
https://doi.org/10.1007/978-0-387-34567-3ason, a hierarchical design method is useful. In the hierarchical design method, it is important to verify whether the low level specification satisfies the high level specification or not. In general, the language inclusion verification method is useful for verifying it. But, as nondeterministic ti作者: BRIDE 時(shí)間: 2025-3-25 11:57
Integrated Series in Information Systems alternatives to traditional development methodologies, demanding a revolutionary change in industry to adopt them. With a pragmatic, lightweight approach, the use of formal methods is complementing and improving existing development practices in a company in an evolutionary way, demonstrating more 作者: auxiliary 時(shí)間: 2025-3-25 17:14 作者: 和平主義者 時(shí)間: 2025-3-25 23:11
Integrated Series in Information Systemsn additional tool in the established cycle, the language live cycle is independent and opens the doors for the application of formal methods. We report on an industrial case study, where a driver specification language has been designed, formally specified, and finally an implementation has been gen作者: Hamper 時(shí)間: 2025-3-26 02:23
Integrated Series in Information Systemsement and on the ABC tools for formal verification of process model properties. We show how process modelling and process model analysis benefit from this integration by gaining a fully automatic global property check capability. We illustrate the approach by means of a process model example taken f作者: biosphere 時(shí)間: 2025-3-26 04:18 作者: 躺下殘殺 時(shí)間: 2025-3-26 09:32 作者: 爆炸 時(shí)間: 2025-3-26 13:01
J?rg Becker,Tobias Heide,?ukasz Lisrify ATM switch LSI chips through the combined use of a theorem prover and model checking programs, and the second one is to try to formally verify the correctness of a cache coherency protocol used in one of our parallel PC servers by model checking programs. In both cases, the verifications themse作者: LAPSE 時(shí)間: 2025-3-26 19:20 作者: Legion 時(shí)間: 2025-3-26 22:56
Applied Formal Methods - FM-Trends 98978-3-540-48257-4Series ISSN 0302-9743 Series E-ISSN 1611-3349 作者: GLIDE 時(shí)間: 2025-3-27 02:24 作者: Anonymous 時(shí)間: 2025-3-27 06:06
Dieter Hutter,Werner Stephan,Markus UllmannIncludes supplementary material: 作者: FUSE 時(shí)間: 2025-3-27 11:33 作者: Creditee 時(shí)間: 2025-3-27 15:05
https://doi.org/10.1007/978-3-658-43930-9 is a multi-institutional co-operative project aiming the development of a methodology, based on the Formal Description Technique (FDT) . and supported by a set of appropriate tools, for the specification, validation, implementation, and testing of distributed multimedia applications. This paper presents the main results of this project.作者: Alopecia-Areata 時(shí)間: 2025-3-27 21:36 作者: 小官 時(shí)間: 2025-3-28 01:37
https://doi.org/10.1007/978-0-387-34567-3Formal Systems and DERA have enjoyed a number of fruitful collaborations in recent years, especially in projects exploiting the FDR tool to analyse CSP models of systems. This paper presents an overview of the approach and some of the diverse applications to which it has been applied.作者: 審問 時(shí)間: 2025-3-28 03:31 作者: 你敢命令 時(shí)間: 2025-3-28 08:33
Design of Distributed Multimedia Applications (DAMD) is a multi-institutional co-operative project aiming the development of a methodology, based on the Formal Description Technique (FDT) . and supported by a set of appropriate tools, for the specification, validation, implementation, and testing of distributed multimedia applications. This paper presents the main results of this project.作者: Catheter 時(shí)間: 2025-3-28 11:54
Structured Formal Verification of a Fragment of the IBM S/390 Clock ChipWe present a simple and powerful method for formal verification of hardware that exploits hardware symmetries. We illustrate the method at an industrial example: a fragment of the IBM S/390 Clock Chip.作者: 1FAWN 時(shí)間: 2025-3-28 16:21
Critical Systems Validation and Verification with CSP and FDRFormal Systems and DERA have enjoyed a number of fruitful collaborations in recent years, especially in projects exploiting the FDR tool to analyse CSP models of systems. This paper presents an overview of the approach and some of the diverse applications to which it has been applied.作者: 高興一回 時(shí)間: 2025-3-28 22:27
UniForM Perspectives for Formal MethodsTrends for Formal Methods are reviewed and illustrated by several industrial applications: logical foundations of combination, verification, transformation, testing, and tool support. The UniForM Workbench is the background for highlighting experiences made over the past 20 years.作者: 不舒服 時(shí)間: 2025-3-28 23:30 作者: sundowning 時(shí)間: 2025-3-29 04:24
978-3-540-66462-8Springer-Verlag Berlin Heidelberg 1999作者: 四牛在彎曲 時(shí)間: 2025-3-29 10:30 作者: Soliloquy 時(shí)間: 2025-3-29 11:53 作者: 小畫像 時(shí)間: 2025-3-29 15:54 作者: degradation 時(shí)間: 2025-3-29 20:40
Integrated Series in Information Systemserated from the specification. Using Abstract State Machines and Montages for the language specification, it was possible that the industrial partners learned how to maintain and extend the language specification. On the other hand the formal semantics of the method allows to apply different verification-oriented methods to the artifacts.作者: 合乎習(xí)俗 時(shí)間: 2025-3-30 00:51
Conference proceedings 1999, in Boppard, Germany. The main objective of the workshop was to draw a map of the key issues facing the practical application of formal methods in industry. This appears to be particularly timely with safety and security issues becoming a real obstacle to industrial software and hardware developmen作者: 拱墻 時(shí)間: 2025-3-30 07:57 作者: 熱烈的歡迎 時(shí)間: 2025-3-30 09:42 作者: 流浪者 時(shí)間: 2025-3-30 13:07
https://doi.org/10.1007/978-3-642-15509-3and the automatic extraction of a prototype. Classical difficulties — like cohabitation of hierarchized objects, smooth handling of subtyping, and completion of partial relations — are addressed both from theorem proving and prototyping viewpoint.作者: COLON 時(shí)間: 2025-3-30 18:34
Integrated Series in Information Systemsatecharts and then these test cases are ‘merged’ to derive test cases for complex statecharts. They are then populated with test data. Methods for generating test cases for simple statecharts and for ‘merging’ of such test cases, are described using a simple example. The blackbox test method presented is easy to automate.作者: 騙子 時(shí)間: 2025-3-30 22:14
Integrated Series in Information Systemsoach, the use of formal methods is complementing and improving existing development practices in a company in an evolutionary way, demonstrating more clearly the cost-effectiveness of formal methods. This paper presents our view on lightweight formal methods as a strategy for successful formal methods technology transfer to industry.作者: 來自于 時(shí)間: 2025-3-31 03:35 作者: 運(yùn)動(dòng)的我 時(shí)間: 2025-3-31 07:27 作者: 季雨 時(shí)間: 2025-3-31 10:31 作者: Outwit 時(shí)間: 2025-3-31 15:28 作者: 有角 時(shí)間: 2025-3-31 18:21
Formal Program Development in Geometric Modelingand the automatic extraction of a prototype. Classical difficulties — like cohabitation of hierarchized objects, smooth handling of subtyping, and completion of partial relations — are addressed both from theorem proving and prototyping viewpoint.作者: 比目魚 時(shí)間: 2025-3-31 21:54
Automated Test Set Generation for Statechartsatecharts and then these test cases are ‘merged’ to derive test cases for complex statecharts. They are then populated with test data. Methods for generating test cases for simple statecharts and for ‘merging’ of such test cases, are described using a simple example. The blackbox test method presented is easy to automate.作者: CRUDE 時(shí)間: 2025-4-1 05:35
A Lightweight Approach to Formal Methodsoach, the use of formal methods is complementing and improving existing development practices in a company in an evolutionary way, demonstrating more clearly the cost-effectiveness of formal methods. This paper presents our view on lightweight formal methods as a strategy for successful formal methods technology transfer to industry.作者: inhibit 時(shí)間: 2025-4-1 09:11
An Open Environment for the Integration of Heterogeneous Modelling Techniques and Toolsues and tools, and to relearn in a new environment. What makes this switch even harder to accept: due to their research character, tools for formal methods can usually not compete w.r.t. convenience, stability, and degree of integration to conventional, state-of-the-art commercial tools.作者: 擴(kuò)張 時(shí)間: 2025-4-1 13:23
A Symbolic Model Checker for ACTLnd, possibly recursive, ACTL formulae into BSP (Boolean Symbolic Programming), a programming language aiming at defining computations on boolean functions, and by using the BSP interpreter to carry out computations (i.e. verifications).作者: senile-dementia 時(shí)間: 2025-4-1 14:40
Formal Methods in the Specification of the Emergency Closing System of the Eastern Scheldt Storm Surmal methods also pose problems. Much depends on the communication between the client and the expert and, since the client is not able to assess the work of the formed methods specialist, the trust between them.作者: 證實(shí) 時(shí)間: 2025-4-1 20:42 作者: 同位素 時(shí)間: 2025-4-2 01:41
Yoshimasa Masuda,Murlikrishna Viswanathanisms which have become available through Gurevich’s Abstract State Machines. Through its versatility the ASM approach is non-monolithic and integratable at any development level into current design and analysis environments. We also collect experimental evidence for the ASM thesis, a generalization of Turing’s thesis.作者: 關(guān)節(jié)炎 時(shí)間: 2025-4-2 05:06 作者: paragon 時(shí)間: 2025-4-2 10:01
https://doi.org/10.1007/978-0-387-34567-3lidation for industrial code generators from DC+ -a widely used intermediate format for synchronous languages- to C. We explain the compilation pattern from DC+ to C and advocate new abstraction techniques for a fragment of first order logic as part of the automation of our approach.作者: hangdog 時(shí)間: 2025-4-2 15:11
https://doi.org/10.1007/978-0-387-34567-3ierarchical design method based on timed simulation method. Especially, we generalize existing timed simulation methods and propose a . timed simulation relation and a ?-liveness timed simulation relation, a ?-liveness timed simulation relation. Finally, we show our proposed method effective by some example.作者: TIGER 時(shí)間: 2025-4-2 17:44
