派博傳思國際中心

標題: Titlebook: Analog Circuit Design; RF Analog-to-Digital Rudy J. Plassche,Hohan H. Huijsing,Willy Sansen Book 1997 Springer Science+Business Media Dordr [打印本頁]

作者: 和尚吃肉片    時間: 2025-3-21 19:49
書目名稱Analog Circuit Design影響因子(影響力)




書目名稱Analog Circuit Design影響因子(影響力)學科排名




書目名稱Analog Circuit Design網絡公開度




書目名稱Analog Circuit Design網絡公開度學科排名




書目名稱Analog Circuit Design被引頻次




書目名稱Analog Circuit Design被引頻次學科排名




書目名稱Analog Circuit Design年度引用




書目名稱Analog Circuit Design年度引用學科排名




書目名稱Analog Circuit Design讀者反饋




書目名稱Analog Circuit Design讀者反饋學科排名





作者: cacophony    時間: 2025-3-21 21:02

作者: Meditate    時間: 2025-3-22 02:23
Capacitive Interfaces for Monolithic Integrated Sensorspecial processing and because of their dual function as sensor and electrostatic actuator. The principles and practical considerations for capacitive sensor interfaces are discussed along with circuit examples including a precision sensor with a 3×10.m/rt-Hz position measurement noise floor.
作者: epicondylitis    時間: 2025-3-22 08:14

作者: 盟軍    時間: 2025-3-22 09:01
https://doi.org/10.1007/978-3-663-08422-8lding A/D converters. As an example the design of a 40 MHz 8-bit folding A/D converter in 0.35 μm technology is described. The A/D converter uses a supply voltage of 2.5 V and has a power dissipation of 28 mW.
作者: 能得到    時間: 2025-3-22 16:46
Considerations Before Going into the Field,ars. Emphasis is placed on the evolution of A/D and D/A converters for today’s ADSL applications. Then design considerations for high speed and high resolution pipelined A/D converters for future VDSL technology will be addressed.
作者: 聾子    時間: 2025-3-22 17:09
Joshua Sangoro,Tyler Cosby,Friedrich Kremerpecial processing and because of their dual function as sensor and electrostatic actuator. The principles and practical considerations for capacitive sensor interfaces are discussed along with circuit examples including a precision sensor with a 3×10.m/rt-Hz position measurement noise floor.
作者: rheumatism    時間: 2025-3-22 21:55

作者: Hiatal-Hernia    時間: 2025-3-23 05:14

作者: 違反    時間: 2025-3-23 06:54
B. Baysal,B. A. Lowry,H. Yu,W. H. Stockmayerensation, and calibration of such microtransducers should be attempted by silicon integrated circuits. Microsensor compensation and calibration methodology is revisited and a comprehensive list of eight basic compensation techniques is compiled.
作者: GRACE    時間: 2025-3-23 10:56
https://doi.org/10.1007/978-3-662-06705-5qualitative discussion of the various physical processes responsible for phase noise production, particularly in CMOS oscillators, and it offers a common treatment of resonator-based oscillators, ring oscillators, and relaxation oscillators.
作者: 緩和    時間: 2025-3-23 16:49

作者: 仔細閱讀    時間: 2025-3-23 20:02
Dielectric Properties of Oven-Dry Wood,d provided as a parameter to behavioral models for inclusion in a high-level simulation of the entire PLL. This approach is efficient enough to be applied to complex systems, such as frequency synthesizers with large divide ratios or fractional-N synthesizers.
作者: 結果    時間: 2025-3-24 00:07
Advances in State-of-the-Art in Smart Sensor Signal Conditioningor Signal Processor from one of the Silicon Valley start-up companies. Finally it introduces the emerging IEEE-P1451 Standard for Smart Transducer Interface for Sensors and Actuators and characterizes its impact on smart sensor electronics.
作者: 財主    時間: 2025-3-24 02:34
Compensation and Calibration of IC Microsensorsensation, and calibration of such microtransducers should be attempted by silicon integrated circuits. Microsensor compensation and calibration methodology is revisited and a comprehensive list of eight basic compensation techniques is compiled.
作者: HEAVY    時間: 2025-3-24 10:12

作者: 歡樂東方    時間: 2025-3-24 11:25
Fully Integrated Low Phase-Noise VCOs: from Post-Processing to Standard CMOS allows state-of-the-art phase noise performance at no extra cost. Finally, it is shown that by thorough analysis of standard planar inductors with finite-element simulations, performances can be achieved that are even better than structures requiring extra processing cost. This is done despite a low-ohmic substrate with only two metal layers.
作者: synovitis    時間: 2025-3-24 15:32

作者: 幾何學家    時間: 2025-3-24 20:46

作者: Pigeon    時間: 2025-3-25 00:35

作者: 小蟲    時間: 2025-3-25 06:34

作者: 預知    時間: 2025-3-25 11:00

作者: CRUMB    時間: 2025-3-25 14:35
Juan Pablo Borja,Toh-Ming Lu,Joel Plawskyand Interpolating architecture. The ADC is optimized for digital telecommunication applications. The integrated Track & Hold circuit enables SNR > 66 dB and THD < 72 dB, measured over an input signal bandwidth of 70 MHz. The ADC is realized in a 13 GHz, 1 μm BiCMOS process and measures 7 mm., while
作者: acquisition    時間: 2025-3-25 18:24
Dielectric Polymer Nanocompositesitioning technology over the last decades, with the focus on smart transducer technology. It discusses in detail an advanced design of the Analog Sensor Signal Processor from one of the Silicon Valley start-up companies. Finally it introduces the emerging IEEE-P1451 Standard for Smart Transducer Int
作者: CLOWN    時間: 2025-3-25 20:13

作者: overwrought    時間: 2025-3-26 03:57
Joshua Sangoro,Tyler Cosby,Friedrich Kremerhic integration of the sensing element and interface electronics for reduced size and power dissipation, simplified packaging, and increased functionality. The need to resolve sub-Angstrom displacements poses a challenge on the interface. Capacitive pickups are attractive since they do not require s
作者: 大氣層    時間: 2025-3-26 04:28
Dielectric Properties of Isolated Clustersctly read-out by a microcontroller, service the following sensor elements: Pt resistors, thermistors, potentiometers resistors, capacitors, resistive bridges and voltage- and current sources. It is shown that, even when using lowcost CMOS technology, these interface and sensor systems can have a rat
作者: infantile    時間: 2025-3-26 12:28

作者: MARS    時間: 2025-3-26 14:30
https://doi.org/10.1007/978-3-662-06705-5ally in oscillators which do not use a passive resonator. It is also difficult to model flicker noise in the close-in phase noise spectrum. This is a qualitative discussion of the various physical processes responsible for phase noise production, particularly in CMOS oscillators, and it offers a com
作者: 我悲傷    時間: 2025-3-26 17:27
Dielectric Properties of Oven-Dry Wood,echniques are reported that can enhance the performance of a normal planar inductor coil. Bonding wire inductors are presented as an alternative, that allows state-of-the-art phase noise performance at no extra cost. Finally, it is shown that by thorough analysis of standard planar inductors with fi
作者: coltish    時間: 2025-3-27 00:34

作者: 不能和解    時間: 2025-3-27 01:19

作者: cipher    時間: 2025-3-27 09:14

作者: Occupation    時間: 2025-3-27 13:19

作者: insidious    時間: 2025-3-27 14:47

作者: 平靜生活    時間: 2025-3-27 17:59
Integrated Sensor Systems in CMOS TechnologyIn this contribution we discuss the tundamental issues ot designing and building integrated sensor systems in CMOS technology.
作者: septicemia    時間: 2025-3-27 23:25

作者: Predigest    時間: 2025-3-28 05:30

作者: strdulate    時間: 2025-3-28 08:14

作者: arboretum    時間: 2025-3-28 11:21
An Embedded 170-mW 10-Bit 50-MS/s CMOS ADC in 1-mm2le-metal, single-poly CMOS process, the circuit measures 1.4-mm × 1.4-mm including a bandgap and a S&H, while the ADC itself occupies 1-mm.. At a conversion rate of 50-MS/s the untrimmed ADC dissipates 170-mW and exhibits 54-dB S/ (N+D) with a 12-MHz 90% full-scale input.
作者: modest    時間: 2025-3-28 15:58

作者: 騎師    時間: 2025-3-28 20:57
Low-Power Sensor Interfaceslectronic circuits. The impact of sensing concepts and specifications on power consumption in microsystems is investigated. Examples of LPLV interface circuits for piezoresistive and capacitive sensors are presented.
作者: GLADE    時間: 2025-3-29 01:47

作者: obstinate    時間: 2025-3-29 03:47
978-1-4419-5185-4Springer Science+Business Media Dordrecht 1997
作者: 有花    時間: 2025-3-29 10:37
Overview: 978-1-4419-5185-4978-1-4757-2602-2
作者: 含糊其辭    時間: 2025-3-29 14:32
,Delikt und ?konomische Theorie,g frequencies up to 1 GSample/s. Suitable circuit techniques which were implemented to assure this performance will be presented in detail, as well as the simulation techniques that were applied throughout the design process. We will complete this chapter with a presentation of the measurement setup and the measured performance characteristics.
作者: Infantry    時間: 2025-3-29 17:28

作者: adroit    時間: 2025-3-29 23:45

作者: Evolve    時間: 2025-3-30 00:17
Dielectric Properties of Ionic Liquidslectronic circuits. The impact of sensing concepts and specifications on power consumption in microsystems is investigated. Examples of LPLV interface circuits for piezoresistive and capacitive sensors are presented.
作者: GRAZE    時間: 2025-3-30 04:07
Design of a Silicon Bipolar Track&Hold IC for 1GSample/s and 10 bit Linearity over the full Nyquist g frequencies up to 1 GSample/s. Suitable circuit techniques which were implemented to assure this performance will be presented in detail, as well as the simulation techniques that were applied throughout the design process. We will complete this chapter with a presentation of the measurement setup
作者: Arrhythmia    時間: 2025-3-30 08:40
Power and Scaling Rules of CMOS High-Speed A/D Convertersign of the A/D converter in the same technology is to be preferred. A/D converters based on a folding architecture are capable to fulfill the increasing demand for performance to such embedded A/D converters. This paper describes CMOS technology directions and trends related to the performance of fo
作者: 吃掉    時間: 2025-3-30 15:42
An Embedded 170-mW 10-Bit 50-MS/s CMOS ADC in 1-mm2le-metal, single-poly CMOS process, the circuit measures 1.4-mm × 1.4-mm including a bandgap and a S&H, while the ADC itself occupies 1-mm.. At a conversion rate of 50-MS/s the untrimmed ADC dissipates 170-mW and exhibits 54-dB S/ (N+D) with a 12-MHz 90% full-scale input.
作者: 高度    時間: 2025-3-30 17:04

作者: expound    時間: 2025-3-31 00:04
A 12 bit, 50 MSample/s Cascaded Folding & Interpolating ADCand Interpolating architecture. The ADC is optimized for digital telecommunication applications. The integrated Track & Hold circuit enables SNR > 66 dB and THD < 72 dB, measured over an input signal bandwidth of 70 MHz. The ADC is realized in a 13 GHz, 1 μm BiCMOS process and measures 7 mm., while
作者: 值得贊賞    時間: 2025-3-31 03:42





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