派博傳思國際中心

標題: Titlebook: Analog Circuit Design; Low-Noise, Low-Power Johan H. Huijsing,Rudy J. Plassche,Willy M. C. San Book 1996 Springer Science+Business Media Do [打印本頁]

作者: LH941    時間: 2025-3-21 18:21
書目名稱Analog Circuit Design影響因子(影響力)




書目名稱Analog Circuit Design影響因子(影響力)學科排名




書目名稱Analog Circuit Design網(wǎng)絡(luò)公開度




書目名稱Analog Circuit Design網(wǎng)絡(luò)公開度學科排名




書目名稱Analog Circuit Design被引頻次




書目名稱Analog Circuit Design被引頻次學科排名




書目名稱Analog Circuit Design年度引用




書目名稱Analog Circuit Design年度引用學科排名




書目名稱Analog Circuit Design讀者反饋




書目名稱Analog Circuit Design讀者反饋學科排名





作者: 熔巖    時間: 2025-3-21 21:16

作者: A精確的    時間: 2025-3-22 03:23

作者: evaculate    時間: 2025-3-22 04:48
Low-Noise Oscillatorsechniques exist for optimizing the noise behavior, depending on the specific class. Methods vary from optimization of the oscillator itself to the coupling of a number of oscillators. Two important classes of oscillators are first-order oscillators and second-order oscillators. One of the most promi
作者: 分解    時間: 2025-3-22 12:45

作者: antipsychotic    時間: 2025-3-22 14:38
Low Power Folding A/D Convertersure is a reduced number of comparators by the implementation of an analog preprocessing circuit, resulting in a very compact, low power and high speed A/D converter. Design issues and low power implementation of the analog preprocessing and comparators are discussed. Two prototype folding A/D conver
作者: urethritis    時間: 2025-3-22 21:06
Synthesis and Layout for Analog and Mixed-Signal ICs in the ACACIA Systemetc. Despite substantial progress on CAD tools, these analog subsystems are still mostly designed by hand. This paper surveys progress on one proposed solution to this problem: a top-to-bottom tool suite for analog and mixed-signal designs under development at Carnegie Mellon University, called ACAC
作者: 神刊    時間: 2025-3-22 23:46
CAD Simulation for Mixed Signal Designtwo simulation algorithms are insufficient to support complete simulation of todays complex systems. In a typical telecommunications system we can expect to find at least some of the following blocks: RAM, ROM, DSP’s, Filters, control logic, A-to-D and D-to-A convertors, datapaths, embedded processo
作者: elastic    時間: 2025-3-23 05:27
Mixed-Mode Design: Experiences with Multi-Level Macromodeling-continuous and time-discrete, behavioral and structural models to ?mixed-signal macromodels”. Submodels on different levels of Abstraction are combined, too (multi-level approach). Due to the complexity of such models, an automatic generation is not possible. Instead, a heuristic approach is propos
作者: 充氣球    時間: 2025-3-23 06:36

作者: Preamble    時間: 2025-3-23 13:44
Computer-Aided testability analysis for analog circuits for an objective quantification of the test effectiveness. This paper describes how the technique of Inductive Fault Analysis can be used to quantify the test effectiveness on basis of realistic data on manufacturing defects. Experiences with the tool suite developed to support this analysis show t
作者: 金絲雀    時間: 2025-3-23 15:19
Concepts for bandgap References and voltage measurement systemsics of bipolar transistors, and methods to compensate for this temperature dependence for application in accurate bandgap References. Methods and technologies to calibrate bandgap References are discussed. As case studies, two types of bandgap References are discussed. One of them is implemented in
作者: 使迷惑    時間: 2025-3-23 18:41
Monolithic Voltage and Current References: Theme and Variations are of moderate to high accuracy, and generally intended for operation in a low-voltage commercial context, which typically means a minimum supply of 2.7V and a minimum temperature of-30°C. In some cases, the supply may be as low as 1.2V and operation may be required at temperatures of-55°C, though
作者: EXPEL    時間: 2025-3-23 23:16
Integrated Current and Time Referenceswithout the need for external components, clocking, or trimming. Low temperature-drift current sources can also be realized with this method, which uses MOS threshold and mobility temperature-coefficient cancellation.
作者: 歡樂中國    時間: 2025-3-24 02:37

作者: regale    時間: 2025-3-24 09:22
Johan H. Huijsing,Rudy J. Plassche,Willy M. C. San
作者: finale    時間: 2025-3-24 13:22

作者: Enthralling    時間: 2025-3-24 16:19

作者: Ablation    時間: 2025-3-24 21:41

作者: BOOM    時間: 2025-3-25 00:47
978-1-4419-5157-1Springer Science+Business Media Dordrecht 1996
作者: homeostasis    時間: 2025-3-25 05:08
Low-Noise HF Amplifierse and inductive sources, general noise matching conditions are derived. The best noise performance obtainable by using bipolar and CMOS approaches are determined. Design examples and measurement results are presented which confirm the theoretical analyses.
作者: Malcontent    時間: 2025-3-25 10:50

作者: Clumsy    時間: 2025-3-25 15:17
Design of High-Speed Low-Power Sample-and-Hold Amplifiers for Low-Voltage Applicationsese techniques have been utilized in two 3-V sampling circuits, namely, a 100-MHz 10-mW all-npn implementation employing capacitive coupling between the input and output, and a 200-MHz 15-mW BiCMOS design using a low-voltage sampling switch. Each circuit allows swings of 1.5 V, providing 10 bits of dynamic range in a 3-V system.
作者: 弄皺    時間: 2025-3-25 18:56

作者: elastic    時間: 2025-3-25 23:58

作者: 詞匯    時間: 2025-3-26 04:11
https://doi.org/10.1007/978-3-658-05755-8In this contribution we analyze the basis of mixed mode simulation, with emphasis on the design environment. We study the potential sources of problems and how SGS-THOMSON manages them in its proprietary CAD environment called UNICAD.
作者: 威脅你    時間: 2025-3-26 07:15

作者: 開花期女    時間: 2025-3-26 10:47

作者: 發(fā)芽    時間: 2025-3-26 15:27
M?gliche Arten gemeinsamerUnternehmungeningly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques will be described for the compensation of these nonideal effects.
作者: HEW    時間: 2025-3-26 20:51

作者: archenemy    時間: 2025-3-26 22:28
Die übersetzung der Organisationd extensions in HDL-A. Furthermore the application of the language will be discussed in connection with design methodologies. Possibilities and limitation for behavioral model generation will be demonstrated.
作者: ablate    時間: 2025-3-27 04:44
https://doi.org/10.57088/978-3-7329-9071-9without the need for external components, clocking, or trimming. Low temperature-drift current sources can also be realized with this method, which uses MOS threshold and mobility temperature-coefficient cancellation.
作者: 敏捷    時間: 2025-3-27 06:01

作者: 瘋狂    時間: 2025-3-27 13:28
https://doi.org/10.1007/978-3-658-24744-7e and inductive sources, general noise matching conditions are derived. The best noise performance obtainable by using bipolar and CMOS approaches are determined. Design examples and measurement results are presented which confirm the theoretical analyses.
作者: 言行自由    時間: 2025-3-27 16:00
Teilbereich III. Schlussbetrachtung,f the different solutions are shown. Requirements for low-power, low-voltage, low noise, high gain and linearity at high IF-frequencies from the system point of view are worked out. Solutions will be presented to optain optimum performance by technology and circuit design technique for digital wirel
作者: climax    時間: 2025-3-27 20:12

作者: 走調(diào)    時間: 2025-3-28 00:33

作者: 確保    時間: 2025-3-28 02:14

作者: 慷慨援助    時間: 2025-3-28 08:53
https://doi.org/10.1007/978-3-658-32940-2ure is a reduced number of comparators by the implementation of an analog preprocessing circuit, resulting in a very compact, low power and high speed A/D converter. Design issues and low power implementation of the analog preprocessing and comparators are discussed. Two prototype folding A/D conver
作者: 陪審團每個人    時間: 2025-3-28 12:47
Die überpflanzung der M?nnlichen Keimdrüseetc. Despite substantial progress on CAD tools, these analog subsystems are still mostly designed by hand. This paper surveys progress on one proposed solution to this problem: a top-to-bottom tool suite for analog and mixed-signal designs under development at Carnegie Mellon University, called ACAC
作者: 消散    時間: 2025-3-28 17:46
,Die Keimdrüsentransplantation beim Manne,two simulation algorithms are insufficient to support complete simulation of todays complex systems. In a typical telecommunications system we can expect to find at least some of the following blocks: RAM, ROM, DSP’s, Filters, control logic, A-to-D and D-to-A convertors, datapaths, embedded processo
作者: 花束    時間: 2025-3-28 20:04

作者: Dendritic-Cells    時間: 2025-3-29 00:17

作者: Humble    時間: 2025-3-29 03:55

作者: cipher    時間: 2025-3-29 08:47

作者: Aqueous-Humor    時間: 2025-3-29 14:11
https://doi.org/10.57088/978-3-7329-9071-9 are of moderate to high accuracy, and generally intended for operation in a low-voltage commercial context, which typically means a minimum supply of 2.7V and a minimum temperature of-30°C. In some cases, the supply may be as low as 1.2V and operation may be required at temperatures of-55°C, though
作者: 鼓掌    時間: 2025-3-29 19:00

作者: 媽媽不開心    時間: 2025-3-29 22:59
Der Prinzipiencharakter von Grundrechten,table oscillation are given and the effects of nonlinearities are discussed. The special case of the three-point oscillator is analyzed in more detail. The basic conditions and trade-offs are derived analytically for the case of a lossless circuit, and current minimization by amplitude regulation is
作者: Eosinophils    時間: 2025-3-30 03:36

作者: chronology    時間: 2025-3-30 06:57
https://doi.org/10.1007/978-3-658-06494-5sing optimization strategies for first-order oscillators seems to be coupling large numbers of oscillators; however, technology is not quite ready for this. Optimization of second-order oscillators by coupling does not appear to be of great general use. In this case much improvement can be achieved with optimization of the oscillator itself.
作者: DIS    時間: 2025-3-30 11:50
https://doi.org/10.1007/978-3-658-32940-2ters are presented, one for 5 V supply voltage and one for 3.3 V supply voltage. The first design operates at 70 MHz clock frequency and dissipates 110 mW. The 3.3 V low voltage design operates at 45 MHz and dissipates only 45 mW. Chip area is 0.75 mm. in 0.8 . CMOS technology.
作者: 通知    時間: 2025-3-30 13:27

作者: 有組織    時間: 2025-3-30 17:19

作者: 淡紫色花    時間: 2025-3-30 23:45
Die übersetzung der Organisationbipolar technology, the other one in CMOS technology. A novel type of bandgap reference, the so-called dynamic bandgap reference, is presented. This bandgap reference is particularly useful for CMOS measurement systems, where it can improve the accuracy of the system. Some basic problems for the accuracy of bandgap References are discussed.
作者: 匍匐    時間: 2025-3-31 03:23
Der Prinzipiencharakter von Grundrechten,he first divider to minimize power consumption. The chip, implemented in a 2 μm n-well process, includes a frequency-divider chain and the front-end for digital tuning. It operates from 1.8 to 3.5 volts with less than 500 nA. The measured frequency stability is 0.04 ppm/V and 0.1ppm/°C.
作者: 酷熱    時間: 2025-3-31 08:35
Crystal Oscillatorshe first divider to minimize power consumption. The chip, implemented in a 2 μm n-well process, includes a frequency-divider chain and the front-end for digital tuning. It operates from 1.8 to 3.5 volts with less than 500 nA. The measured frequency stability is 0.04 ppm/V and 0.1ppm/°C.
作者: Infuriate    時間: 2025-3-31 12:32
,Die Keimdrüsentransplantation beim Manne,lled DSR This paper discusses the issues involved in the simulation and analysis of analogue, digital, sampled data and DSP blocks as a system and presents a potential solution for end users, based on currently available technology.
作者: 憤怒事實    時間: 2025-3-31 15:58

作者: 雇傭兵    時間: 2025-3-31 19:41
CAD Simulation for Mixed Signal Designlled DSR This paper discusses the issues involved in the simulation and analysis of analogue, digital, sampled data and DSP blocks as a system and presents a potential solution for end users, based on currently available technology.
作者: 胰臟    時間: 2025-4-1 00:57
Monolithic Voltage and Current References: Theme and Variationsantages. Brief mention will be made of the special challenges of realizing voltage References in an all-CMOS process; a dynamic reference, interesting and valuable because it requires only a single junction device, is described.




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